Research

Research Interests

Compiler support for multi-core and many-core systems
Functional programming
Coordination programming
Data flow computing
Programming language design and implementation
Program optimisation / transformation / parallelisation / compilation
Energy efficiency / green computing
High productivity programming vs igh performance computing trade-off
Memory management in concurrent environments
High performance computing
Multi-core and many-core computer architecture
and much more ....

Research Vision

Computing systems in the post clock frequency scaling era provide unprecedented peak performance levels. However, effectively harnessing this compute power for concrete applications becomes increasingly and exceedingly difficult. Modern computing systems are highly parallel and increasingly heterogeneous with specialised hardware units for particular compute tasks, and it is generally agreed in the hardware community that this trend will persist for the foreseeable future.

From the software engineering perspective current and more so future compute architectures bring up a number of challenges. Traditionally sequential software must be parallelised and the necessary synchronisation and communication requirements met. Computing tasks must be mapped to computing elements with diverse properties, thus creating a large design space. Independent compute tasks, potentially belonging to independent applications simultaneously running on the same system compete for computing resources, thus quickly leading to soft real time issues. Large numbers of compute elements increase the likelihood of transient and permanent failure of individual elements without compromising the overall system's availability, thus requiring software to deal with failure as well as with dynamically changing hardware resources. Last not least, the traditional notion of performance as either latency or throughput is increasingly replaced by a multi-objective scenario putting latency and/or throughput in relation to energy consumption.

Modern software must address all of the above issues while at the same time the diversity of system architectures and configurations continuously grows. With the currently prevailing low-level and machine-centric programming methodologies and the corresponding tool chains these requirements put a large burden on the programmer rendering the software development process inefficient, unproductive and eventually economically inviable (in particular in high labour cost countries).

My research agenda pursues a comprehensive approach to address compilation of resource-agnostic program specifications to diverse compute architectures, management of heterogeneous computing resources, placement of application (components), energy consumption and dependability through advanced compiler and runtime system technology. My central objective is to reconcile software engineering productivity, application portability and runtime performance in terms of latency, throughput and energy consumption for current and upcoming system architectures.

My research plan is based on the concerted design and (prototypical) implementation of programming languages and programming language concepts with an emphasis on declarative techniques, advanced compilation technology that maps resource-agnostic high-level code to a variety of computing architectures and adaptive runtime systems that mediate between application components and computing resources in a closed feedback loop.

I'm involved in a leading position in a number of research projects that develop and maintain novel programming languages, compilers and runtime systems for today's and tomorrow's compute architectures. Despite the diversity of features the common goal of all these projects is to facilitate the programming of modern compute architectures, to effectively map concurrent programs on different hardware architectures and to increase the confidence into the correctness of computed results.

Research Projects

SAC (Single Assignment C)

is a purely functional array programming language aimed at computationally intensive applications. SAC combines stateless multi-dimensional arrays and an APL-like programming methodology with competitive sequential performance and fully compiler-directed parallelisation for a variety of architectures. The development of SAC has partially been funded through the EU FP-7 projects Apple-CORE and ADVANCE.
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S-Net

is a declarative coordination language and component framework for defining streaming networks of asynchronous components. S-Net offers near-complete separation of concerns between component engineering in a traditional language suitable for the application area (or reuse of sequential legacy code) and concurrency engineering, i.e. the orchestration of such components into a parallel application that efficiently exploits modern hardware. The development of S-Net has partially been funded through the EU FP-6 project AETHER and the EU FP-7 project ADVANCE.
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CAOS (Cells, Agents and Observers for Simulation)

is a high-level domain-specific programming language for the definition of extended cellular automata and their parallel simulation on shared as well as distributed memory computing architectures or combinations thereof, such as clusters of multi-core systems. The term extended cellular automaton here refers to a class of software architectures that is characterised by a multi-dimensional rectangular grid of (some) data and a transition function that computes new grid elements by some function on the grid elements of a certain neighbourhood for some number of previous generations.
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Qube - dependently typed array programming

is a dependently typed array programming language inspired by SAC. It implements the same formal calculus of multi-dimensional arrays as SAC, but features a rigorous dependent type system that allows us to precisely specify structural relationships between argument and result arrays of functions and statically prove the absence of certain programming errors, typically out-of-bound indexing of arrays.
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System Organisation Lab

is a computer-controlled 16sqm H0 scale model railway used to study, illustrate and teach the principles of organising the orderly asynchronous behaviour of complex concurrent systems. I was involved in this activity while working at the University of Kiel.
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