Biography

I am Sobhan Niknam. I am now a postdoctoral researcher at the Parallel Computing Systems (PCS) group within the Informatics Institute of University of Amsterdam. I work under the supervision of Prof.dr. Andy Piemntel on the ADMORPH project that is funded by the EU Horizon 2020 research and innovation programme. Prior to this, I received my Ph.D. in computer science from the Leiden Institude of Advanced Computer Science (LIACS) at Leiden University under the supervision of Dr. Todor Stefanov in August 2020. My research interests include, but are not limited to, system-level design of fault-tolerant, energy-efficient, and real-time multiprocessor embedded systems, parallel dataflow models of computation, and design space exploration.

Education
  • PhD in Computer Science, 2020

    Leiden University, The Netherlands.

  • MSc Computer Engineering, 2014

    Iran University of Sicene and Technology, Iran.

  • BSc in Computer Engineering, 2012

    Shahed University, Iran.

Publications

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(2021). T-TSP:Transient-Temperature Based Safe Power Budgeting in Multi-/Many-Core Processors. In The 39th IEEE International Conference on Computer Design (ICCD), (Accepted).

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(2020). On the Implementation and Execution of Adaptive Streaming Applications Modeled as MADF. in the proc. of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES).

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(2019). Surf-Bless:A Confined-interference Routing for Energy-Efficient Communication in NoCs. in the Proc. of the 56th ACM/IEEE International Design Automation Conference (DAC'19).

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(2019). A Dynamic Bypass Approach to Realize Power Efficient Network-on-Chip. in the Proc. of the 21st IEEE International Conferences on High Performance Computing and Communications (HPCC).

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(2017). Energy-Efficient Scheduling of Throughput-Constrained Streaming Applications by Periodic Mode Switching. in the proc. of the 17th IEEE International Conference on Embedded Computer Systems:Architectures, MOdeling, and Simulation (SAMOS).

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(2015). Energy efficient 3D Hybrid processor-memory architecture for the dark silicon age. in the proc. of 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).

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Contact

  • s.niknam@uva.nl
  • Science Park 904, Amsterdam, CA 1098XH