Lab 4 MIPS Pipeline¶
Assignment 1¶
Download all architectures from the zip file innopolis lab4
Use "mips_pipelined" for this part of the assignment. Some of the layout may look weird, this is because
it has "holes" were new components will appear in the next architecture.
1.1 a - Write a tiny program (2 - 5 instructions) that exhibits a data hazard.
1.1 b - Rewrite it such that the hazard is no longer a problem.
1.1 c - Which of the four types of data hazard described in the textbook did your program exhibit?
Explain your answer.
Assignment 2¶
From now on, use "mips_pipelined_fw"
1.2 a - How does this architecture avoid most data hazards?
1.2 b - There are still data hazards possible, give an example and explain how the
architecture could be modified to avoid that hazard.
Assignment 3¶
Use "mips_bp1" and "mips_bp2" for this part of the assignment.
Note that for ease of use, there is no branch delay slot in these architectures.
For each of the architectures, attempt to discover how they predict branches by experimentation.
Describe the branch prediction mechanism of both architectures in as much detail as you can, and back up your conclusions with experiments.
Discover at least the answers to the following questions:
- is the prediction purely static or dynamic or does it have qualities of both?
- if the prediction has a static compoment, based on what does it make the prediction?
- if the prediction has a dynamic component, what is the maximum number of incorrect "taken" predictions it make before it switches its prediction to "not taken"?
In your lab report (technish rapport), discuss how to take advantage of the properties of the two branch predictors to make code faster.
Hand in: the two programs you wrote for part 1 and the experiments you used in part 2, and a pdf containing the answer to questions 1.1 c, 1.2 a, 1.2 b and a complete "technisch rapport" (in a new section) for part 2.