Abstract
The dark silicon era is driving the emergence of asymmetric computing platforms consisting of cores with diverse power-performance characteristics enabling better match between a task’s requirements and the compute engine leading to substantially improved energy-efficiency. In this chapter, we discuss the challenges and opportunities offered by asymmetric multi-cores towards low-power, high-performance mobile computing. We present a comprehensive power management framework that can guarantee Quality of Service (QoS), while minimizing energy consumption within the Thermal Design Power (TDP) budget.
Anuj Pathania
Assistant Professor
Anuj Pathania is an Assistant Professor in the Parallel Computing Systems (PCS) group at the University of Amsterdam (UvA). His research focuses on the design of sustainable systems deployed in power-, thermal-, energy- and reliability-constrained environments.